000 | 03484nam a22005055i 4500 | ||
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001 | vtls000542856 | ||
003 | RU-ToGU | ||
005 | 20210922082406.0 | ||
007 | cr nn 008mamaa | ||
008 | 160915s2014 gw | s |||| 0|eng d | ||
020 |
_a9783319049427 _9978-3-319-04942-7 |
||
024 | 7 |
_a10.1007/978-3-319-04942-7 _2doi |
|
035 | _ato000542856 | ||
040 |
_aSpringer _cSpringer _dRU-ToGU |
||
050 | 4 | _aTK7888.4 | |
072 | 7 |
_aTJFC _2bicssc |
|
072 | 7 |
_aTEC008010 _2bisacsh |
|
082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aKritikakou, Angeliki. _eauthor. _9448565 |
|
245 | 1 | 0 |
_aScalable and Near-Optimal Design Space Exploration for Embedded Systems _helectronic resource _cby Angeliki Kritikakou, Francky Catthoor, Costas Goutis. |
260 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2014. |
||
300 |
_aXVII, 277 p. 80 illus., 2 illus. in color. _bonline resource. |
||
336 |
_atext _btxt _2rdacontent |
||
337 |
_acomputer _bc _2rdamedia |
||
338 |
_aonline resource _bcr _2rdacarrier |
||
505 | 0 | _aIntroduction & Motivation -- Reusable DSE methodology for scalable & near-optimal frameworks -- Part I Background memory management methodologies -- Development of intra-signal in-place methodology -- Pattern representation -- Intra-signal in-place methodology for non-overlapping scenario -- Intra-signal in-place methodology for overlapping scenario -- Part II Processing related mapping methodologies -- Design-time scheduling techniques DSE framework -- Methodology to develop design-time scheduling techniques under constraints -- Design Exploration Methodology for Microprocessor & HW accelerators -- Conclusions & Future Directions. | |
520 | _aThis book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies. The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems. Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design. • Describes design space exploration (DSE) methodologies for data storage and processing in embedded systems, which achieve near-optimal solutions with scalable exploration time; • Presents a set of principles and the processes which support the development of the proposed scalable and near-optimal methodologies; • Enables readers to apply scalable and near-optimal methodologies to the intra-signal in-place optimization step for both regular and irregular memory accesses. | ||
650 | 0 |
_aengineering. _9224332 |
|
650 | 0 |
_aComputer Science. _9155490 |
|
650 | 0 |
_aelectronics. _9303071 |
|
650 | 0 |
_aSystems engineering. _9303074 |
|
650 | 1 | 4 |
_aEngineering. _9224332 |
650 | 2 | 4 |
_aCircuits and Systems. _9303075 |
650 | 2 | 4 |
_aProcessor Architectures. _9303114 |
650 | 2 | 4 |
_aElectronics and Microelectronics, Instrumentation. _9303076 |
650 | 2 | 4 |
_aEnergy, general. _9410515 |
700 | 1 |
_aCatthoor, Francky. _eauthor. _9314850 |
|
700 | 1 |
_aGoutis, Costas. _eauthor. _9448566 |
|
710 | 2 |
_aSpringerLink (Online service) _9143950 |
|
773 | 0 | _tSpringer eBooks | |
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-3-319-04942-7 |
912 | _aZDB-2-ENG | ||
999 | _c400222 |